/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/tegra234-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/tegra234-clock.h>
#include <dt-bindings/tegra234-p3767-0000-common.h>

/ {
    compatible = JETSON_COMPATIBLE_P3768;
    jetson-header-name = "Jetson 24pin CSI Connector";
    overlay-name = "TC358743 OVERLAY";

	/* i2c configuration */
	fragment@0 {
		/* /bus@0/i2c@3180000 */
		target = <&cam_i2c>;

		__overlay__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;
			
			tc358743@f {
				compatible = "toshiba,tc358743";
				reg = <0x0f>;
				status = "okay";

				/* gpio pins */
				reset-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>;
				interrupt-parent = <&gpio>;
				interrupts = <TEGRA234_MAIN_GPIO(G, 3) IRQ_TYPE_LEVEL_HIGH>;
			
				/* clock */
				clocks = <&tc358743_refclk>;
				clock-names = "refclk";
				refclk_hz = <27000000>;
			
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					
					port@0 {
						reg = <0>;

						tc358743_out: endpoint {
							port-index = <0>;
							bus-width = <2>;
							data-lanes = <1 2>;
							clock-noncontinuous;
							link-frequencies = /bits/ 64 <297000000>;
							remote-endpoint = <&csi_in>;
						};
					};
				};
			};
		};
	};

	/* nvcsi configuration (cam0 port chip) */
	fragment@1 {
		/* /bus@0/host1x@13e00000/nvcsi@15a00000  */
		target = <&nvcsi>;

		__overlay__ {
			status = "okay";
			num-channels = <1>;

			channel@0 {
				status = "okay";
				reg = <0>;

				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					
					port@0 {
						status = "okay";
						reg = <0>;

						csi_in: endpoint@0 {
							port-index = <0>;
							bus-width = <2>;
							remote-endpoint = <&tc358743_out>;
						};
					};

					port@1 {
						status = "okay";
						reg = <1>;
						csi_out: endpoint@1 {
							remote-endpoint = <&vi_in>;
						};
					};
				};
			};
		};
	};

	/*vi configuration */
	fragment@2 {
		/* /tegra-capture-vi */
		target = <&capture_vi>;

		__overlay__ {
			status = "okay";
			num-channels = <1>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					status = "okay";
					reg = <0>;
					vi_in: endpoint {
						port-index = <0>;
						bus-width = <2>;
						remote-endpoint = <&csi_out>;
					};
				};
			};
		};
	};

	/* clock configuration */
	fragment@3 {
		target-path = "/";
		
		__overlay__ {
			tc358743_refclk: tc358743-clock {
				compatible = "fixed-clock";
				#clock-cells = <0>;
				clock-frequency = <27000000>;
				clock-output-names = "tc358743-refclk";
			};
		};
	};
};